hdl-util / hdmi Star 1.3k Code Issues Pull requests Send video/audio over HDMI on an FPGA audio video fpga intel xilinx vivado altera hdmi systemverilog dvi quartus hdlmake Updated Jul 13, 2026 SystemVerilog
RDSik / verilog-transceiver Star 4 Code Issues Pull requests Educational project for the Xilinx ZedBoard Zynq-7000 Development Kit python docker fpga chocolatey verilog make vivado icarus-verilog modelsim testbench winget cocotb hdlmake Updated Mar 11, 2025 Verilog
JochiSt / Nexys4-liteeth Star 2 Code Issues Pull requests use the liteeth core on the Nexys4 board vhdl litex nexys4 liteeth hdlmake Updated Feb 3, 2026 Tcl
tomaz-suller / PoliLEG Star 1 Code Issues Pull requests Simplified, monocycle version of the LEGv8 processor designed by PCS Poli-USP and implemented in VHDL for Digital Systems II vhdl legv8-arm hdlmake legv8 polileg Updated Jan 9, 2022 VHDL
kkrizka / endeavour_firmware Star 1 Code Issues Pull requests Testbench for playing with the Endeavour protocol used by AMACv2. firmware atlas testbench endeavour hdlmake Updated May 12, 2018 Verilog
RDSik / si5340-config-loader Star 1 Code Issues Pull requests Module for load configuration from ClockBuilderPro to Si5340 PLL via i2c interface fpga i2c makefile chocolatey verilog make systemverilog modelsim testbench verilator quartus winget cocotb hdlmake Updated Mar 14, 2025 Verilog
sameer / DE2-115-template Sponsor Star 1 Code Issues Pull requests HDLMake template for terasIC DE2-115 template vhdl verilog de2-115 hdlmake Updated Feb 6, 2020 Tcl
tomaz-suller / hdlmake-template Star 1 Code Issues Pull requests Template for use with the build tool hdlmake, specifically set up for VHDL development and simulation. vhdl hdlmake Updated Jan 9, 2022 VHDL