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Jul 14, 2019 - Verilog
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quartus-18-1
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Intel FPGA HLS examples - Quartus 18.01
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Updated
Jun 29, 2019 - C++
Highspeed BASIC-52 V1.31 + I2C softcore running from internal 12kB ROM and 4kB RAM implemented inside MAX10 FPGA. 10M08SAU169C8G
microcontroller fpga arrow vhdl verilog systemverilog modelsim highspeed softcore i2c-master max10 altera-fpga max1000 quartus-18-1 basic-52 8bit-computers mcs51-8051
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Sep 10, 2026 - BASIC
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